2026/27 · Official catalogue edition
The effective term printed in this PDF is Semester B 2025/26。
Offering record for 2026/27：Semester B 2026/27
What you will study
- Course overview and aims
- This course aims to introduce the building components, fundamental concepts, and design considerations of System-on-Chip (SoC) for up-to-date embedded microcontroller MCU design with Hardware Description Language (HDL) and ARM instruction set architecture (ISA). The course covers complete design flow from initial specifications down to final implementations with ARM processor board and FPGA for rapid prototyping. Students will learn microcontroller concepts, Software design basics, processor core architecture and interrupt system, C as implemented in assembly language, embedded memory mapping and system, peripherals and standard I/O interfacing, embedded ARM processor on System-on-Chip, such as Field-Programmable Gate Array (FPGA). The course emphasizes hands-on exercises of using Electronic Design Automation (EDA) tools, including ARM Development Studio, ARM mbed, Xilinx Vivado, and Xilinx Vitis, to the design of System-on-Chip (SoC) implemented on FPGA chip.
- Keyword syllabus
- Introduction to System-on-Chip and Internet of Things (IoT) System-on-Chip organization, design consideration, system requirement, Describe the functional components and architecture of an embedded system Introduction to Microprocessor, Microcontroller Building an Embedded System with an Microcontroller Unit (MCU), Microcontroller concepts, Review of Microprocessor Architecture, Arithmetic and Logic Unit (ALU), Concept of Computation, Microcontroller vs. Microprocessor, Stored Program Concept, Reduced Instruction Set Computer (RISC) Philosophy, Instruction Set Architecture, Pipelined Instruction Execution, Compilation and Assembling, ARM Processor Family Embedded Software Design Basics Concurrency, Interrupt Service Routine (ISR), Software Engineering for Embedded Systems, Preemptive vs. Non- preemptive Scheduling, Real-Time Operating System (OS), Peer Code Review ARM Cortex M4 Processor Architecture ARM Architectures and Processors, Cortex A/R/M Series, ARM Processor vs. ARM Architectures, Cortex M4 Registers, Thumb-1 and Thumb-2 Instruction Set, Nested Vectored Interrupt Controller (NVIC), Wakeup Interrupt Controller (WIC), Advanced Microcontroller Bus Architecture (AMBA) ARM Instruction Set Cortex M4 Memory Map, Bit band Operations, Program Image and Endianness, ARM Cortex M4 Processor Instruction Set, Cortex M4 Instruction Set, Multiple Register Transfer Addressing Mode C as Implemented in Assembly Language ARM Programmer Model, Disassembled Program, Code Optimizations, ARM Architecture Procedure Call Standard (AAPCS), Linker Map File, Addressing Automatic and Static Variables, Function Call, Function Prolog and Epilog in C and Assembly. Exceptions and Interrupts Entering an exception handler, Push context to the current stack, Examine current vector table, Exiting an exception handler, Pop from the stack, Processor core interrupt, Nested Vectored Interrupt Controller (NVIC) registers and states, Timing analysis, Interrupt response latency General Purpose I/O, and Peripherals and interfacing General Purpose Input/Output (GPIO), Basic Concepts, Port Circuitry, Peripheral Access In C, Circuit Interfacing, Digital vs. Analog IO FPGA & ARM & RISC-V Processor FPGA Overview, FPGA + ARM Processor, Multi processor System-on-Chip (MPSoC), Building Blocks of a Generic Microcontroller, PicoBlaze vs. MicroBlaze, RISC-V Architecture, Zynq SoC (AP SoC), Processing System (PS), Processor Peripherals, AXI Interfaces Timer & Serial Communications Clock, Reset, and Debug Features, Interrupt Timer, Pulse-width modulation (PWM) Module, Serial communications, Full Duplex / Half Duplex, Software structure, Universal asynchronous receiver-transmitter (UART), Inter-Integrated Circuit (I2C), Serial Peripheral Interface (SPI) Tutorial Schedule: 1. ARM Development Studion Installation 2. Hello World running on ARM 3. ARM Assembly Programming 4. Embedded Software Scheduling 5. Blinky C Program on ARM 6. ARM Instruction Set Architecture 7. Blinky Assembly Program on ARM 8. Timer Assembly Program on ARM 9. System-on-Chip Design Flow 10. Highl-level Synthesis (HLS) for System-on-Chip 11. Using Vivado and Vitis to Design SoC 12. System-on-Chip Numerical Acceleration Laboratory Experiment: The five lab exercises are design to enable students to gain hands-on experience using both ARM-based system, and FPGA- based System-on-Chip system: 1. Designing Embedded System with STM32F401RE ARM Board 2. Interrupt Programming and Debugging with Nucleo-F401RE Board and ARM mbed Platform 3. Designing System-on-Chip with MicroBlaze on FPGA 4. Creating custom IP for MicroBlaze and PWM on FPGA 5. Using Seven Segment Display and Pmod with MicroBlaze on FPGA
Official PDF, page 4 · Keyword Syllabus
- Intended learning outcomes
View learning outcomes
CILO Intended learning outcome Weight DEC 1 Describe the functional components and architecture of an System-on-Chip (SoC) — DEC-A1, DEC-A2 2 Use assembly language and HDL to programme an System-on-Chip (SoC) — DEC-A1, DEC-A2 3 Design the memory system, standard I/O, interrupt for an System-on-Chip (SoC) — DEC-A1, DEC-A2, DEC-A3 4 Implement System-on-Chip (SoC) by integrating processing system (ARM processor), programmable logic and standard AMBA bus architecture — DEC-A1, DEC-A2, DEC-A3 Official PDF, page 2 · Course Intended Learning Outcomes (CILOs)
Before you take this course
Check prerequisites, precursors and corequisites separately, together with equivalence and exclusion conditions. “and” means conditions must be met together; “or” marks alternatives. Read combined conditions in the groupings shown in the original text below.
- Prerequisites
- EE2004 Microcomputer Systems
- Precursors
- Nil
- Corequisites
- This edition of the official syllabus does not state this item.
- Additional course requirements
- This edition of the official syllabus does not state this item.
- Equivalent courses and conditions
- Nil
- Exclusive courses and conditions
- Nil
Assessment and passing the course
- Assessment
- Continuous assessment: 50%; Examination: 50%; Examination duration: 2 hours
Assessment breakdown
Assessment task Weight Generative AI Remarks and restrictions TestsCILO 1, 2, 3, 4 30% No - AssignmentsCILO 1, 2, 3, 4 10% Yes - Lab Exercises/ReportsCILO 3, 4 10% Yes - Official PDF, page 3 · Assessment Tasks / Activities (ATs)
View the original assessment table and instructions
Assessment Tasks / Activities (ATs) Tests (min.: 2) | CILO No. 1, 2, 3, 4 | Weighting 30% | Remarks - | Allow GenAI? No #Assignments (min.: 3) | CILO No. 1, 2, 3, 4 | Weighting 10% | Remarks - | Allow GenAI? Yes Lab Exercises/Reports | CILO No. 3, 4 | Weighting 10% | Remarks - | Allow GenAI? Yes
- Passing requirements
- Remark: To pass the course, students are required to achieve at least 30% in coursework and 30% in the examination. Also, 75% laboratory attendance rate must be obtained. # may include homework, tutorial exercise, project/mini-project, presentation
The catalogue assessment percentages are indicative; the course syllabus provides the detailed assessment scheme.
Credits, duration and edition details
- Title in this edition
- System-on-Chip Design
- Credits in this edition
- 3
- Course duration
- One Semester
- Syllabus effective term
- Semester B 2025/26
- Levels printed in the syllabus
- B1, B2, B3, B4 - Bachelor's Degree
Check the official document
Read or download this edition through the university link below. EE3220 · Open the original university PDF ↗
Source · University course information ↗ · Checked 2026-10-18